diff options
author | Aamir Bohra <aamir.bohra@intel.com> | 2018-07-01 00:31:05 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2018-11-23 06:16:15 +0000 |
commit | 4041bcf629c9b0239cca7a71091f6e6f0c669b4b (patch) | |
tree | 74d66674c3f1b5207a930b9a90ca96fe944d3b88 /src/mainboard/intel/icelake_rvp/board_id.c | |
parent | 2fd2923aebae63bdf4567f70d933831f44e082ed (diff) |
mb/intel/icelake_rvp: Add ICL U and Y RVP DIMM configuration
List of ICL board variants
1. ICL-U
DDR4 - All possible DDR4 memory type
LPDDR4 - Memory down fixed DIMM configuration
2. ICL-Y
All LPDDR4 DIMM on platform
This patch ensures to have all proper SPD configuration.
Change-Id: Id596a3c85b13559b3002dcadfee9c945256e28e7
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/29770
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
Diffstat (limited to 'src/mainboard/intel/icelake_rvp/board_id.c')
-rw-r--r-- | src/mainboard/intel/icelake_rvp/board_id.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/src/mainboard/intel/icelake_rvp/board_id.c b/src/mainboard/intel/icelake_rvp/board_id.c new file mode 100644 index 0000000000..6ac312ad8d --- /dev/null +++ b/src/mainboard/intel/icelake_rvp/board_id.c @@ -0,0 +1,51 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include "board_id.h" +#include <boardid.h> +#include <ec/acpi/ec.h> +#include <stdint.h> +#include <ec/google/chromeec/ec.h> + +static int get_board_id_via_ext_ec(void) +{ + uint32_t id = BOARD_ID_INIT; + + if (google_chromeec_get_board_version(&id)) + id = BOARD_ID_UNKNOWN; + + return id; +} + +/* Get Board ID via EC I/O port write/read */ +int get_board_id(void) +{ + MAYBE_STATIC int id = -1; + + if (id < 0) { + if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC)) + id = get_board_id_via_ext_ec(); + else{ + uint8_t buffer[2]; + uint8_t index; + if (send_ec_command(EC_FAB_ID_CMD) == 0) { + for (index = 0; index < sizeof(buffer); index++) + buffer[index] = recv_ec_data(); + id = (buffer[0] << 8) | buffer[1]; + } + } + } + + return id; +} |