diff options
author | Mariusz Szafranski <mariuszx.szafranski@intel.com> | 2017-08-02 18:51:47 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2017-09-05 13:39:58 +0000 |
commit | faf7a8e8592f47dc9c92ab1672e30bbf60bc3581 (patch) | |
tree | 4f6ebc18f3c988eb6c52ba8e857c211d36c11651 /src/mainboard/intel/harcuvar/spd/Makefile.inc | |
parent | a404133547c98094a326f60b83e1576ba94b8c06 (diff) |
mainboard/intel/harcuvar: Add support for Intel Harcuvar CRB
The Harcuvar CRB is a reference platform of Intel Atom C3000 SoC
("Denverton" and "Denverton-NS") for the communications segment/market.
The MohonPeak coreboot was used as the starting template with
additions/modifications from other Intel Apollo Lake/Skylake coreboot.
Tested with TianoCore payload (UDK2015) and Poky (Yocto
Project Reference Distro) 2.0 with kernel 4.1.8 booted from
SATA drive and external USB pendrive.
Change-Id: I088833e36e2d22d1fe1610b8dca1454092da511a
Signed-off-by: Mariusz Szafranski <mariuszx.szafranski@intel.com>
Reviewed-on: https://review.coreboot.org/20862
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
Diffstat (limited to 'src/mainboard/intel/harcuvar/spd/Makefile.inc')
-rw-r--r-- | src/mainboard/intel/harcuvar/spd/Makefile.inc | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/src/mainboard/intel/harcuvar/spd/Makefile.inc b/src/mainboard/intel/harcuvar/spd/Makefile.inc new file mode 100644 index 0000000000..8fa8c63d82 --- /dev/null +++ b/src/mainboard/intel/harcuvar/spd/Makefile.inc @@ -0,0 +1,38 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 Google Inc. +## Copyright (C) 2015 - 2017 Intel Corporation. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +romstage-y += spd.c + +SPD_BIN = $(obj)/spd.bin + +# Order matters for SPD sources. The following indicies +# define the SPD data to use. +SPD_SOURCES = micron_4GiB_dimm_MTA9ASF51272PZ-2G1A2 + +SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex) + +# Include spd rom data +$(SPD_BIN): $(SPD_DEPS) + for f in $+; \ + do for c in $$(cat $$f | grep -v ^#); \ + do echo -e -n "\\x$$c"; \ + done; \ + done > $@ + +cbfs-files-y += spd.bin +spd.bin-file := $(SPD_BIN) +spd.bin-position := $(CONFIG_SPD_LOC) +spd.bin-type := spd |