diff options
author | Shaunak Saha <shaunak.saha@intel.com> | 2017-12-06 12:23:01 -0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-12-20 16:59:59 +0000 |
commit | bebec08ca0dc7c180db9b1266d1311fdf634f59c (patch) | |
tree | 8febb656e1a841f0fa888f67d5a67fc4e74a1851 /src/mainboard/intel/glkrvp/variants/baseboard/include | |
parent | 41cfd5ba69783c33883d4515ffa15ac279afb831 (diff) |
mb/intel/glkrvp: Configure SCI/SMI in glkrvp for ESPI
This patch configures the EC_SCI_GPI when ESPI is enabled.Also adds
mainboard espi handler function.
TEST= Boot to OS and SMI/SCI is working when ESPI is enabled/disabled.
Change-Id: I2b3845d54ad7c1f14edc86f71b3f968424711999
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/22761
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel/glkrvp/variants/baseboard/include')
-rw-r--r-- | src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h index 41de87c7ce..dc23abd2fc 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/intel/glkrvp/variants/baseboard/include/baseboard/gpio.h @@ -22,7 +22,11 @@ * GPIO_11 for SCI is routed to GPE0_DW1 and maps to group GPIO_GPE_N_31_0 * which is North community */ +#if IS_ENABLED(CONFIG_SOC_ESPI) +#define EC_SCI_GPI GPE0A_ESPI_SCI_STS +#else #define EC_SCI_GPI GPE0_DW1_05 +#endif /* EC SMI */ #define EC_SMI_GPI GPIO_41 |