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authorHarsha B R <harsha.b.r@intel.com>2023-01-31 15:45:22 +0530
committerSridhar Siricilla <sridhar.siricilla@intel.com>2023-02-05 17:36:24 +0000
commit9c471e7defd0897457d7dca290677f1559956afa (patch)
tree958157e7377f038b0f32491a7586d296e633317f /src/mainboard/intel/galileo/reg_access.h
parent7b8cbdd76bb28e2268fce39731f35d0207605caa (diff)
mb/intel/mtlrvp: Override display configuration
This patch enables display configuration for mtlrvp. The change follows mtlrvp schematics. BUG=b:224325352 BRANCH=None TEST=Able to observe corresponding UPD configuration with FSP dump. Also verify display over eDP and HDMI. DdiPortAConfig : 0x1 DdiPortBConfig : 0x0 DdiPortAHpd : 0x0 DdiPortBHpd : 0x1 DdiPortCHpd : 0x0 DdiPort1Hpd : 0x0 DdiPort2Hpd : 0x0 DdiPort3Hpd : 0x0 DdiPort4Hpd : 0x0 DdiPortADdc : 0x0 DdiPortBDdc : 0x1 Signed-off-by: Harsha B R <harsha.b.r@intel.com> Change-Id: I05bd7427d6a339ee200731a8dd448e85efc694e0 Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72645 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src/mainboard/intel/galileo/reg_access.h')
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