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authorTan, Lean Sheng <lean.sheng.tan@intel.com>2020-11-27 04:21:38 -0800
committerWerner Zeh <werner.zeh@siemens.com>2020-12-10 10:48:25 +0000
commit1ec9284e143f4ea3506f38b49c70cf3a535234b9 (patch)
tree0beb48f776659b8918c48981dd5eb55f1d81681c /src/mainboard/intel/elkhartlake_crb/variants
parent170f2edadb5688989cbb1a7b899fb0a0615f78bd (diff)
mb/intel/ehlcrb: Remove IPU & MIPI related support from EHL CRB
THis patch removes IPU & MIPI related support from EHL CRB as they are not supported in EHL. Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com> Change-Id: I3eb038009daaabd048f40c7953cb2c111cd4fe63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48122 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Diffstat (limited to 'src/mainboard/intel/elkhartlake_crb/variants')
-rw-r--r--src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb111
1 files changed, 2 insertions, 109 deletions
diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
index af0c7530f7..2c3a4776cc 100644
--- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
+++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb
@@ -28,21 +28,6 @@ chip soc/intel/elkhartlake
end
end # SA Thermal device
- device pci 05.0 on
- chip drivers/intel/mipi_camera
- register "acpi_uid" = "0x50000"
- register "acpi_name" = ""IPU0""
- register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
-
- register "cio2_num_ports" = "2"
- register "cio2_lanes_used" = "{2,2}"
- register "cio2_lane_endpoint[0]" = ""^I2C4.CAM0""
- register "cio2_lane_endpoint[1]" = ""^I2C5.CAM1""
- register "cio2_prt[0]" = "0"
- register "cio2_prt[1]" = "2"
- device generic 0 on end
- end
- end
device pci 12.0 off end # Thermal Subsystem
device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2
@@ -178,100 +163,8 @@ chip soc/intel/elkhartlake
device pci 16.4 off end # Management Engine Interface 3
device pci 16.5 off end # Management Engine Interface 4
device pci 17.0 off end # SATA
- device pci 19.0 on # I2C #4 Cam 0
- chip drivers/intel/mipi_camera
- register "acpi_hid" = ""OVTI2740""
- register "acpi_uid" = "0"
- register "acpi_name" = ""CAM0""
- register "chip_name" = ""Ov 2740 Camera""
- register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
- register "has_power_resource" = "1"
-
- register "ssdb.lanes_used" = "2"
- register "num_freq_entries" = "1"
- register "link_freq[0]" = "360000000"
- register "remote_name" = ""IPU0""
-
- #Controls
- register "clk_panel.clks[0].clknum" = "0" #IMGCLKOUT_3
- register "clk_panel.clks[0].freq" = "1" #19.2 Mhz
-
- register "gpio_panel.gpio[0].gpio_num" = "GPP_D5" #reset
- register "gpio_panel.gpio[1].gpio_num" = "GPP_B14" #power
-
- #_ON
- register "on_seq.ops_cnt" = "4"
- register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
- register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
- register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)"
- register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
-
- #_OFF
- register "off_seq.ops_cnt" = "3"
- register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
- register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
- register "off_seq.ops[2]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
-
- device i2c 10 on end
- end
- end
- device pci 19.1 on # I2C #5 Cam 1 and VCM
- chip drivers/intel/mipi_camera
- register "acpi_hid" = ""OVTI5675""
- register "acpi_uid" = "0"
- register "acpi_name" = ""CAM1""
- register "chip_name" = ""Ov 5675 Camera""
- register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
-
- register "ssdb.lanes_used" = "2"
- register "ssdb.link_used" = "1"
- register "ssdb.vcm_type" = "0x0C"
- register "vcm_name" = ""VCM0""
- register "num_freq_entries" = "1"
- register "link_freq[0]" = "DEFAULT_LINK_FREQ"
- register "remote_name" = ""IPU0""
-
- register "has_power_resource" = "1"
- #Controls
- register "clk_panel.clks[0].clknum" = "1" #IMGCLKOUT_3
- register "clk_panel.clks[0].freq" = "1" #19.2 Mhz
-
- register "gpio_panel.gpio[0].gpio_num" = "GPP_D4" #power_enable
- register "gpio_panel.gpio[1].gpio_num" = "GPP_C19" #reset
-
- #_ON
- register "on_seq.ops_cnt" = "4"
- register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
- register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
- register "on_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 5)"
- register "on_seq.ops[3]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
-
- #_OFF
- register "off_seq.ops_cnt" = "3"
- register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
- register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
- register "off_seq.ops[2]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
-
- device i2c 36 on end
- end
- chip drivers/intel/mipi_camera
- register "acpi_hid" = "ACPI_DT_NAMESPACE_HID"
- register "acpi_uid" = "3"
- register "acpi_name" = ""VCM0""
- register "chip_name" = ""DW AF DAC""
- register "device_type" = "INTEL_ACPI_CAMERA_VCM"
-
- register "pr0" = ""\\_SB.PCI0.I2C5.CAM1.PRIC""
- register "vcm_compat" = ""dongwoon,dw9714""
-
- register "ssdb.lanes_used" = "2"
- register "num_freq_entries" = "1"
- register "link_freq[0]" = "DEFAULT_LINK_FREQ"
- register "remote_name" = ""IPU0""
- device i2c 0C on end
- end
- end
-
+ device pci 19.0 on end # I2C #4
+ device pci 19.1 on end # I2C #5
device pci 19.2 on end # UART #2
device pci 1a.0 on end # eMMC
device pci 1c.0 off end # PCI Express Port 1