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authorTan, Lean Sheng <lean.sheng.tan@intel.com>2020-11-26 23:08:36 -0800
committerWerner Zeh <werner.zeh@siemens.com>2020-12-10 10:47:39 +0000
commitb5fed68ab9e8b8551977b3903cbdbeae6186ccb5 (patch)
treed326b185af352296cef239d7723be07173e42689 /src/mainboard/intel/elkhartlake_crb/variants/ehlcrb
parent1057106db82c39555412b44eafc9f9fb9b0bd0ed (diff)
mb/intel/ehlcrb: Remove ChromeOS support from mainboard
Since ChromeOS is not officially supported for EHL CRB, removing ChromeOS related codes. Here are the change details: - Remove ChromeOS related kconfig switches, including SOC_INTEL_CSE_LITE_SKU which has dependency on ChromeOS flag - Remove chromeos.c file - Remove ChromeOS dsdt related codes from dsdt.asl & mainboard.c - Remove ChromeOS GPIO related codes from variants.h & gpio.c Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com> Change-Id: I4aabd40a4b46d4e64534b99e84e0523eaeaff816 Reviewed-on: https://review.coreboot.org/c/coreboot/+/48117 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/intel/elkhartlake_crb/variants/ehlcrb')
-rw-r--r--src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c
index f01202b498..fe2aff74d2 100644
--- a/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c
+++ b/src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/gpio.c
@@ -25,13 +25,3 @@ const struct pad_config *variant_early_gpio_table(size_t *num)
*num = ARRAY_SIZE(early_gpio_table);
return early_gpio_table;
}
-
-static const struct cros_gpio cros_gpios[] = {
- CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_COMM0_NAME),
-};
-
-const struct cros_gpio *variant_cros_gpios(size_t *num)
-{
- *num = ARRAY_SIZE(cros_gpios);
- return cros_gpios;
-}