diff options
| author | Keith Hui <buurin@gmail.com> | 2024-02-05 19:18:43 -0500 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2024-06-08 00:19:23 +0000 |
| commit | a911b758482025d46e132eeb2ed0279b65692075 (patch) | |
| tree | fb8475ef03a0365132fefb82bc248468ef0a4784 /src/mainboard/intel/dq67sw/early_init.c | |
| parent | ee126348726b24fbf6e5435bb2cf15417959a8f7 (diff) | |
mb/*: Remove old USB configurations from SNB/bd82x6x boards
Remove USB configurations and data structures from northbridge
devicetree (SNB+MRC boards) and bootblock/romstage C code
(native-only SNB boards). All USB configurations are drawn from
southbridge devicetree going forward.
Change-Id: Ie1cd21077136998a6e90050c95263f2efed68a67
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81882
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/dq67sw/early_init.c')
| -rw-r--r-- | src/mainboard/intel/dq67sw/early_init.c | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/src/mainboard/intel/dq67sw/early_init.c b/src/mainboard/intel/dq67sw/early_init.c index 14317a69e0..f7515a540c 100644 --- a/src/mainboard/intel/dq67sw/early_init.c +++ b/src/mainboard/intel/dq67sw/early_init.c @@ -1,29 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <southbridge/intel/bd82x6x/pch.h> #include <superio/winbond/w83667hg-a/w83667hg-a.h> #include <superio/winbond/common/winbond.h> #define SERIAL_DEV PNP_DEV(0x2e, W83667HG_A_SP1) -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 1, 0 }, - { 1, 1, 0 }, - { 1, 1, 1 }, - { 1, 1, 1 }, - { 1, 0, 2 }, - { 1, 0, 2 }, - { 1, 0, 3 }, - { 1, 0, 3 }, - { 1, 1, 4 }, - { 1, 1, 4 }, - { 0, 0, 5 }, - { 0, 0, 5 }, - { 1, 0, 6 }, - { 1, 0, 6 }, -}; - void bootblock_mainboard_early_init(void) { winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); |