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authorElyes HAOUAS <ehaouas@noos.fr>2018-03-28 21:54:17 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-04-11 09:29:03 +0000
commitb93f48205afefe6d6c827165b8798af7f823f14c (patch)
tree23fd8566ed12123e8e3cf2991d4a88e421f095df /src/mainboard/intel/dg43gt
parentac312c690ce16031dbe7612dac83dac387fad3d6 (diff)
mb/intel/dg43gt/devicetree.cb: Use tabs over spaces
Change-Id: I5d18dfea0b0a33995de805219bda3a73892e5fde Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/25418 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/intel/dg43gt')
-rw-r--r--src/mainboard/intel/dg43gt/devicetree.cb12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/intel/dg43gt/devicetree.cb b/src/mainboard/intel/dg43gt/devicetree.cb
index 6d87794fe3..70ba6bccbb 100644
--- a/src/mainboard/intel/dg43gt/devicetree.cb
+++ b/src/mainboard/intel/dg43gt/devicetree.cb
@@ -43,16 +43,16 @@ chip northbridge/intel/x4x # Northbridge
device pci 19.0 on end # GBE
device pci 1a.0 on end # USB
- device pci 1a.1 on end # USB
- device pci 1a.2 on end # USB
- device pci 1a.7 on end # USB
+ device pci 1a.1 on end # USB
+ device pci 1a.2 on end # USB
+ device pci 1a.7 on end # USB
device pci 1b.0 on end # Audio
device pci 1c.0 on end # PCIe 1
device pci 1c.1 off end # PCIe 2
device pci 1c.2 on end # PCIe 3
device pci 1c.3 on end # PCIe 4
- device pci 1c.4 off end # PCIe 5
- device pci 1c.5 off end # PCIe 6
+ device pci 1c.4 off end # PCIe 5
+ device pci 1c.5 off end # PCIe 6
device pci 1d.0 on end # USB
device pci 1d.1 on end # USB
device pci 1d.2 on end # USB
@@ -108,7 +108,7 @@ chip northbridge/intel/x4x # Northbridge
device pci 1f.3 on # SMbus
chip drivers/i2c/ck505 # SLG8XP549T
register "mask" = "{ 0xff, 0xff, 0xff,
- 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff,
0xff, 0xff }"
register "regs" = "{ 0x11, 0xd9, 0xff,