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author | Bora Guvendik <bora.guvendik@intel.com> | 2023-03-12 12:24:58 -0700 |
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committer | Subrata Banik <subratabanik@google.com> | 2023-04-04 08:07:56 +0000 |
commit | 94050499ca9fa1b1ebb7a867eea3f722a4ca85c9 (patch) | |
tree | d90306b162dcf5e1cd50203fd139643190529b6e /src/mainboard/intel/dg43gt/data.vbt | |
parent | fb1b192cf1c101dad40991081e406dddf52bd7fd (diff) |
soc/intel/alderlake: Add support for CSE timestamp data versions
CSE performance data timestamps are different for version 1
Alder Lake/Raptor Lake and version 2 Meteor Lake. This patch
moves the current ADL/RPL timestamp definitions to a separate
header file. It marks current structure as version 1.
BUG=b:259366109
TEST=Boot to OS, check ADL/RPL pre-cpu timestamps.
Change-Id: I780e250707d1d04891a5a1210b30aecb2c8620d3
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73712
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Diffstat (limited to 'src/mainboard/intel/dg43gt/data.vbt')
0 files changed, 0 insertions, 0 deletions