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author | Aamir Bohra <aamir.bohra@intel.com> | 2018-11-22 15:52:19 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-27 08:47:30 +0000 |
commit | 3e8eb32fbaa5783a2ec1f1d72a1fbc9d04573263 (patch) | |
tree | feb5e33c756f6cec4aa35ea9ff1fbcff49d14083 /src/mainboard/intel/dg43gt/cmos.layout | |
parent | 47ed269251bd1c51e6ddb691d2af7bc230ad69ed (diff) |
mb/intel/icelake_rvp: Add USB port capablity information
This implementation adds USB port capablity map for ICL-U and ICL-Y
RVP.
Change-Id: I20bb43c47439df0a25ff148eae2b3e0546e4bc63
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/29792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/mainboard/intel/dg43gt/cmos.layout')
0 files changed, 0 insertions, 0 deletions