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authorArthur Heymans <arthur@aheymans.xyz>2019-11-12 19:11:50 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-11-18 11:48:35 +0000
commitfa5d0f835b1f3bb8907e616913cbf7b91d09ef26 (patch)
treeaf8d33b500b91fa9e2f1a76d9115086644ccf3d2 /src/mainboard/intel/dcp847ske
parent59eb2fdb6b06618311ef118996ca8c1d28a85ffc (diff)
nb/intel/sandybridge: Set up console in bootblock
Change-Id: Ia041b63201b2a4a2fe6ab11e3497c460f88061d1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36784 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/intel/dcp847ske')
-rw-r--r--src/mainboard/intel/dcp847ske/Makefile.inc1
-rw-r--r--src/mainboard/intel/dcp847ske/early_southbridge.c3
2 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/intel/dcp847ske/Makefile.inc b/src/mainboard/intel/dcp847ske/Makefile.inc
index ec86d8455d..28bc7c7cc9 100644
--- a/src/mainboard/intel/dcp847ske/Makefile.inc
+++ b/src/mainboard/intel/dcp847ske/Makefile.inc
@@ -1,3 +1,4 @@
+bootblock-y += early_southbridge.c
romstage-y += early_southbridge.c
bootblock-y += gpio.c
romstage-y += gpio.c
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c
index 8f38270388..53f5564a97 100644
--- a/src/mainboard/intel/dcp847ske/early_southbridge.c
+++ b/src/mainboard/intel/dcp847ske/early_southbridge.c
@@ -16,6 +16,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <stdint.h>
#include <cf9_reset.h>
#include <device/pci_ops.h>
@@ -160,7 +161,7 @@ static void superio_init(void)
SUPERIO_LOCK;
}
-void mainboard_config_superio(void)
+void bootblock_mainboard_early_init(void)
{
superio_init();
hwm_init();