diff options
author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-03-24 17:01:41 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2019-04-23 10:06:01 +0000 |
commit | da9302a2c42038594ed0127b8887c7d984cd65e1 (patch) | |
tree | e6dee07cdc5ccf60da66ffaa86e855c961c8fd25 /src/mainboard/intel/dcp847ske | |
parent | 78fbe3d8319bc8fdf82b76378d29c6c902fd13e5 (diff) |
nb/intel/sandybridge: Drop pch.h from sandybridge.h
Include pch.h in the source files instead in sandybridge.h.
Tested on Lenovo T520 (Intel Sandy Bridge).
Still boots to OS, no errors visible in dmesg.
Change-Id: I9e5b678e979a8d136d8d00b49486d0a882f77d81
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/intel/dcp847ske')
-rw-r--r-- | src/mainboard/intel/dcp847ske/early_southbridge.c | 1 | ||||
-rw-r--r-- | src/mainboard/intel/dcp847ske/romstage.c | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c index 510073540f..39aeb8f6e2 100644 --- a/src/mainboard/intel/dcp847ske/early_southbridge.c +++ b/src/mainboard/intel/dcp847ske/early_southbridge.c @@ -23,6 +23,7 @@ #include <device/pci_def.h> #include <console/console.h> #include <northbridge/intel/sandybridge/raminit_native.h> +#include <southbridge/intel/bd82x6x/pch.h> #include "superio.h" #include "thermal.h" diff --git a/src/mainboard/intel/dcp847ske/romstage.c b/src/mainboard/intel/dcp847ske/romstage.c index 24ec912a4c..235ad228f8 100644 --- a/src/mainboard/intel/dcp847ske/romstage.c +++ b/src/mainboard/intel/dcp847ske/romstage.c @@ -23,6 +23,7 @@ #else #include <northbridge/intel/sandybridge/raminit.h> #endif +#include <southbridge/intel/bd82x6x/pch.h> #if !CONFIG(USE_NATIVE_RAMINIT) void mainboard_fill_pei_data(struct pei_data *pei_data) |