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authorStefan Reinauer <stepan@coresystems.de>2010-03-29 17:14:28 +0000
committerStefan Reinauer <stepan@openbios.org>2010-03-29 17:14:28 +0000
commitb5828d74455a91553d78ef3077936693ae36213f (patch)
tree193d5967d93635d2b00b141dcac866f6f69956ad /src/mainboard/intel/d945gclf
parent002c9ff3e453b5c93e1681c4ddc7624a4bf9e5a1 (diff)
This patch drops the coreboot CMOS checksum ranges from Kconfig because
the information is already specified in cmos.layout. coreboot is changed to use that version instead. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmai.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/d945gclf')
-rw-r--r--src/mainboard/intel/d945gclf/Kconfig10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig
index 58609ffd11..e701fb7750 100644
--- a/src/mainboard/intel/d945gclf/Kconfig
+++ b/src/mainboard/intel/d945gclf/Kconfig
@@ -61,16 +61,6 @@ config DCACHE_RAM_SIZE
default 0x8000
depends on BOARD_INTEL_D945GCLF
-config LB_CKS_RANGE_END
- int
- default 122
- depends on BOARD_INTEL_D945GCLF
-
-config LB_CKS_LOC
- int
- default 123
- depends on BOARD_INTEL_D945GCLF
-
config MAINBOARD_PART_NUMBER
string
default "D945GCLF"