diff options
| author | Bora Guvendik <bora.guvendik@intel.corp-partner.google.com> | 2023-03-14 15:49:53 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-04-04 08:09:01 +0000 |
| commit | 2453e3b1daba617cd313a2cca36e160385e40a7e (patch) | |
| tree | a00cd9539a0a80e9116d54a8b9f8d9d669bc964b /src/mainboard/intel/d945gclf/mptable.c | |
| parent | 34c37bb1c58f2be5933281c9bff3c033fb939d74 (diff) | |
mb/google/rex: Enable CSE pre-cpu timestamps
Enables pre-cpu boot timestamps from cse.
990:CSME ROM started execution 0
944:CSE sent 'Boot Stall Done' to PMC 47,000
945:CSE started to handle ICC configuration 225,000 (178,000)
946:CSE sent 'Host BIOS Prep Done' to PMC 225,000 (0)
947:CSE received 'CPU Reset Done Ack sent' from PMC 516,000 (291,000)
991:Die Management Unit (DMU) load completed 587,000 (71,000)
0:1st timestamp 597,427 (10,427)
BUG=b:259366109
TEST=Boot on rex, check "cbmem -t"
Change-Id: I68cd53c18af6a400bcd9dc15d428a904b0647495
Signed-off-by: Bora Guvendik <bora.guvendik@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73759
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/intel/d945gclf/mptable.c')
0 files changed, 0 insertions, 0 deletions