diff options
| author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2018-08-07 14:42:57 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-17 12:28:32 +0000 |
| commit | b6f2e7bd4cdee7e91c3f380a25938f53f6d1c6fd (patch) | |
| tree | 6213e56810b7004ff47a2b02db75b1b2964bf9e2 /src/mainboard/intel/coffeelake_rvp/romstage.c | |
| parent | bad8fbb22c9e0ebfbb3c291583527b8a30c3bde9 (diff) | |
mb/intel/coffeelake_rvp: Update spd details as per Coffeelake board
Update SPD details to match with Coffeelake U RVP board
BUG=none
BRANCH=none
TEST=Boot on coffelake U rvp board and check if memory training is
passing and board boots till payload.
Change-Id: I953354cf5c6045731262f4f4e9da230187c2d246
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/27906
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/mainboard/intel/coffeelake_rvp/romstage.c')
| -rw-r--r-- | src/mainboard/intel/coffeelake_rvp/romstage.c | 21 |
1 files changed, 7 insertions, 14 deletions
diff --git a/src/mainboard/intel/coffeelake_rvp/romstage.c b/src/mainboard/intel/coffeelake_rvp/romstage.c index 2eefccaa2c..475a8155fe 100644 --- a/src/mainboard/intel/coffeelake_rvp/romstage.c +++ b/src/mainboard/intel/coffeelake_rvp/romstage.c @@ -27,7 +27,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) { FSP_M_CONFIG *mem_cfg; mem_cfg = &mupd->FspmConfig; - u8 spd_index; mainboard_fill_dq_map_ch0(&mem_cfg->DqByteMapCh0); mainboard_fill_dq_map_ch1(&mem_cfg->DqByteMapCh1); @@ -36,19 +35,13 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) mainboard_fill_rcomp_res_data(&mem_cfg->RcompResistor); mainboard_fill_rcomp_strength_data(&mem_cfg->RcompTarget); - mem_cfg->DqPinsInterleaved = 0; - mem_cfg->CaVrefConfig = 0; /* VREF_CA->CHA/CHB */ + mem_cfg->DqPinsInterleaved = 1; + mem_cfg->CaVrefConfig = 2; /* VREF_CA->CHA/CHB */ mem_cfg->ECT = 1; /* Early Command Training Enabled */ - spd_index = 2; - struct region_device spd_rdev; - - if (get_spd_cbfs_rdev(&spd_rdev, spd_index) < 0) - die("spd.bin not found\n"); - - mem_cfg->MemorySpdDataLen = region_device_sz(&spd_rdev); - /* Memory leak is ok since we have memory mapped boot media */ - mem_cfg->MemorySpdPtr00 = (uintptr_t)rdev_mmap_full(&spd_rdev); - mem_cfg->RefClk = 0; /* Auto Select CLK freq */ - mem_cfg->MemorySpdPtr10 = mem_cfg->MemorySpdPtr00; + /* Setting standard SPD addresses */ + mem_cfg->SpdAddressTable[0] = 0xA0; + mem_cfg->SpdAddressTable[1] = 0xA2; + mem_cfg->SpdAddressTable[2] = 0xA4; + mem_cfg->SpdAddressTable[3] = 0xA6; } |