diff options
author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2018-08-07 12:06:23 +0530 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-14 09:53:09 +0000 |
commit | dfc9917080a9175fef2c40288c586ff9dd5861f3 (patch) | |
tree | 4ec7c50b7c3f376ea8884a792212e6f3cf22ad08 /src/mainboard/intel/coffeelake_rvp/chromeos.fmd | |
parent | 8bd25abc051d039dd05ab3c848fc8fae1eb1c736 (diff) |
mb/intel/coffeelake_rvp: Add support for new board coffeelake RVP
Add support for new board coffeelake RVP.
This patch is a copy patch and copies entire coffeelake_rvp folder from
cannonlake_rvp.
Changes done on top of copy:
1. Change copyright year from 2017 to 2018
2. Rename Cannonlake to Coffelake whenever applicable
3. Update entries in Kconfig and Kconfig.name
4. Rename variant directories to match coffeelake boards
Change-Id: Id37bfeb0ae51fd630fec96273216dbb2900782c7
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/27904
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Naresh Solanki <naresh.solanki@intel.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/coffeelake_rvp/chromeos.fmd')
-rw-r--r-- | src/mainboard/intel/coffeelake_rvp/chromeos.fmd | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/src/mainboard/intel/coffeelake_rvp/chromeos.fmd b/src/mainboard/intel/coffeelake_rvp/chromeos.fmd new file mode 100644 index 0000000000..cca80ab6a4 --- /dev/null +++ b/src/mainboard/intel/coffeelake_rvp/chromeos.fmd @@ -0,0 +1,44 @@ +FLASH@0xff000000 0x1000000 { + SI_ALL@0x0 0x380000 { + SI_DESC@0x0 0x1000 + SI_EC@0x01000 0x80000 + SI_ME@0x81000 0x2ff000 + } + SI_BIOS@0x380000 0xc80000 { + RW_SECTION_A@0x0 0x368000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0x357fc0 + RW_FWID_A@0x367fc0 0x40 + } + RW_SECTION_B@0x368000 0x368000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0x357fc0 + RW_FWID_B@0x367fc0 0x40 + } + RW_MISC@0x6d0000 0x30000 { + UNIFIED_MRC_CACHE@0x0 0x20000 { + RECOVERY_MRC_CACHE@0x0 0x10000 + RW_MRC_CACHE@0x10000 0x10000 + } + RW_ELOG@0x20000 0x4000 + RW_SHARED@0x24000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x28000 0x2000 + RW_NVRAM@0x2a000 0x6000 + } + RW_LEGACY(CBFS)@0x700000 0x200000 + WP_RO@0x900000 0x380000 { + RO_VPD@0x0 0x4000 + RO_UNUSED@0x4000 0xc000 + RO_SECTION@0x10000 0x370000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x280000 + } + } + } +} |