diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2018-08-21 10:50:16 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-09-16 08:34:50 +0000 |
| commit | f349672966fcde4f943c2a5de3c086971aaded44 (patch) | |
| tree | bdd54e399cb2ed1c7c3bdd1feb96961cc324ab02 /src/mainboard/intel/coffeelake_rvp/Makefile.inc | |
| parent | 6f7db0710281466866604a7cfc7d68df94d82ada (diff) | |
mb/intel/coffelake_rvp: Implement mainboard memory information
Turn on SOC_INTEL_CANNONLAKE_MEMCFG_INT for coffeelake rvp platform
for easier collabration on newer platform. The setting in memory.c get
from board design itself.
BUG=N/A
TEST=Build and boot up with whiskey lake rvp platform.
Change-Id: I10f3af4bed511153cef4d6f3a93caea57cc4ae90
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/28257
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/coffeelake_rvp/Makefile.inc')
| -rw-r--r-- | src/mainboard/intel/coffeelake_rvp/Makefile.inc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/intel/coffeelake_rvp/Makefile.inc b/src/mainboard/intel/coffeelake_rvp/Makefile.inc index 7bf3edb6cc..274645370a 100644 --- a/src/mainboard/intel/coffeelake_rvp/Makefile.inc +++ b/src/mainboard/intel/coffeelake_rvp/Makefile.inc @@ -14,14 +14,13 @@ ## GNU General Public License for more details. ## -subdirs-y += spd - bootblock-y += bootblock.c bootblock-$(CONFIG_CHROMEOS) += chromeos.c verstage-$(CONFIG_CHROMEOS) += chromeos.c romstage-$(CONFIG_CHROMEOS) += chromeos.c +romstage-y += memory.c ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-y += mainboard.c |