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| author | Aamir Bohra <aamir.bohra@intel.com> | 2018-06-28 17:24:03 +0530 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2018-06-29 11:40:12 +0000 |
| commit | cbc012318ca03c55180e5895be8852eaae4fd21a (patch) | |
| tree | 7b1017a5cf39875fede5669f10ce4550b9ff4aaf /src/mainboard/intel/cannonlake_rvp/chromeos.c | |
| parent | abe62be81d0c30c6effd263796269932f3e1bf32 (diff) | |
src/device: Add check for existence and validity of PCIE base address config
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Change-Id: I89b0e9c927d395ac6d27201e0b3a8658e958518d
Reviewed-on: https://review.coreboot.org/27263
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/intel/cannonlake_rvp/chromeos.c')
0 files changed, 0 insertions, 0 deletions