src/mainboard/intel/cannonlake: Add gpio support for cannonlake

Add gpio pins configuration for cannonlake rvp u/y boards.

Change-Id: Ia077a070979401fe7bd23bda110d2b66a038d9fc
Signed-off-by: john zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21139
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 28 insertions, 0 deletions

diff --git a/src/mainboard/intel/cannonlake_rvp/bootblock.c b/src/mainboard/intel/cannonlake_rvp/bootblock.c
new file mode 100644
index 0000000000..710f513f81
--- /dev/null
+++ b/src/mainboard/intel/cannonlake_rvp/bootblock.c
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <baseboard/variants.h>
+#include <bootblock_common.h>
+#include <soc/gpio.h>
+#include <variant/gpio.h>
+
+void bootblock_mainboard_init(void)
+{
+	const struct pad_config *pads;
+	size_t num;
+
+	pads = variant_early_gpio_table(&num);
+	gpio_configure_pads(pads, num);
+}