diff options
| author | Shuo Liu <shuo.liu@intel.com> | 2024-03-11 22:03:23 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-05-16 21:05:28 +0000 |
| commit | 43a54184b0f8bdde9cff361a9aded25715bec454 (patch) | |
| tree | 6eab6bebbf249022e5b47b23c53d3f5acedea35d /src/mainboard/intel/beechnutcity_crb/Makefile.mk | |
| parent | 921ddba69ee1513de162c2ea65018124de4c95f1 (diff) | |
mb/intel/beechnutcity_crb: Add GNR/SRF-SP 2S server board Beechnut City
Beechnut City CRB is the 2 socket reference board for 6th Gen Xeon-SP
SP SoCs (Granite Rapids SP and Sierra Forest SP).
This patch initially sets the code set up as a compilation target with
GNR N-1 FSP, and with basic feature supports (Integrated IO Controller
(IIO) configuration, BMC, UART, HPET).
TEST=Build on intel/beechnutcity CRB
Change-Id: I3f6a0fb97b62baadb438fb9f11fdd78fccb3f89a
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Co-authored-by: Gang Chen <gang.c.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/mainboard/intel/beechnutcity_crb/Makefile.mk')
| -rw-r--r-- | src/mainboard/intel/beechnutcity_crb/Makefile.mk | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/intel/beechnutcity_crb/Makefile.mk b/src/mainboard/intel/beechnutcity_crb/Makefile.mk new file mode 100644 index 0000000000..2e1a74a45a --- /dev/null +++ b/src/mainboard/intel/beechnutcity_crb/Makefile.mk @@ -0,0 +1,6 @@ +## SPDX-License-Identifier: GPL-2.0-only + +bootblock-y += bootblock.c +romstage-y += romstage.c +romstage-y += config/iio.c +ramstage-y += ramstage.c |