diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-19 18:42:40 +0100 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-21 06:40:11 +0000 |
| commit | eb5147027e974ba365aa4706935c7c9582cf7619 (patch) | |
| tree | d6ddb25625b91a6db86b7680ca3c92755044a31e /src/mainboard/intel/bayleybay_fsp/Kconfig | |
| parent | c2c634a089fa990418c363e2ff2e5ff70bdd3580 (diff) | |
mb/*/*: Drop FSP_BAYTRAIL support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.
Change-Id: I08c21fd7e5cf8996911c3912bdbaf12d6450db42
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36981
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/mainboard/intel/bayleybay_fsp/Kconfig')
| -rw-r--r-- | src/mainboard/intel/bayleybay_fsp/Kconfig | 67 |
1 files changed, 0 insertions, 67 deletions
diff --git a/src/mainboard/intel/bayleybay_fsp/Kconfig b/src/mainboard/intel/bayleybay_fsp/Kconfig deleted file mode 100644 index 4a08fb1f78..0000000000 --- a/src/mainboard/intel/bayleybay_fsp/Kconfig +++ /dev/null @@ -1,67 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC. -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## - -if BOARD_INTEL_BAYLEYBAY_FSP || BOARD_INTEL_BAKERSPORT_FSP - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select SOC_INTEL_FSP_BAYTRAIL - select BOARD_ROMSIZE_KB_2048 - select HAVE_ACPI_TABLES - select HAVE_OPTION_TABLE - select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT - select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT - -config MAINBOARD_DIR - string - default "intel/bayleybay_fsp" - -config MAINBOARD_PART_NUMBER - string - default "Bakersport CRB (FSP)" if BOARD_INTEL_BAKERSPORT_FSP - default "Bayley Bay CRB (FSP)" - -config MAX_CPUS - int - default 16 - -config FSP_FILE - string - default "../intel/fsp/baytrail/BAYTRAIL_FSP_ECC.fd" if BOARD_INTEL_BAKERSPORT_FSP - default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd" - -config CBFS_SIZE - hex - default 0x00200000 - -config ENABLE_FSP_FAST_BOOT - bool - depends on HAVE_FSP_BIN - default y - -config VIRTUAL_ROM_SIZE - hex - depends on ENABLE_FSP_FAST_BOOT - default 0x800000 - -config FSP_PACKAGE_DEFAULT - bool "Configure defaults for the Intel FSP package" - default n - -config VGA_BIOS - bool - default y if FSP_PACKAGE_DEFAULT - -endif # BOARD_INTEL_BAYLEYBAY_FSP || BOARD_INTEL_BAKERSPORT_FSP |