diff options
| author | Jonathan Zhang <jonzhang@meta.com> | 2023-01-04 14:27:41 -0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2023-04-12 11:43:02 +0000 |
| commit | aaab6566c0a831245a1f4d90efb55fa55ab3a319 (patch) | |
| tree | 6611edf21e61771d3422fc9d19378db1d52fe4be /src/mainboard/intel/archercity_crb/Kconfig.name | |
| parent | 134566395fd816673dde860d8e41c147c46bfb23 (diff) | |
mb/intel: Add 2 SPR sockets CRB Archer City
Intel Archer City CRB is a dual socket CRB with Intel Sapphire Rapids
Scalable Processor chipset. The chipset also includes Emmitsburg PCH.
It was tested with LinuxBoot payload on both dual and single socket
configurations.
The multisocket support depends on Change-Id:
I4a593252bb7f68494f4ccce215ac9cf1eb19b190
Change-Id: Ic02634cd615e2245e394f10aad24b0430cf5cd17
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71968
Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/mainboard/intel/archercity_crb/Kconfig.name')
| -rw-r--r-- | src/mainboard/intel/archercity_crb/Kconfig.name | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/intel/archercity_crb/Kconfig.name b/src/mainboard/intel/archercity_crb/Kconfig.name new file mode 100644 index 0000000000..18dee3a96f --- /dev/null +++ b/src/mainboard/intel/archercity_crb/Kconfig.name @@ -0,0 +1,2 @@ +config BOARD_INTEL_ARCHERCITY_CRB + bool "Archer City CRB" |