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authorLance Zhao <lijian.zhao@intel.com>2015-11-09 17:06:34 -0800
committerMartin Roth <martinroth@google.com>2016-03-21 23:14:09 +0100
commitf51b12735d822289942d8958707f400bc9634d00 (patch)
tree589d5b709af7af1c0dbc614d15e98c525083663f /src/mainboard/intel/apollolake_rvp
parent5c10abeb734d8adee217bc5ed1edcb042064d239 (diff)
soc/apollolake: Add skeleton ACPI entry
Change-Id: Ib127af5392ca2b349480f5b21fad2186b444d7e6 Signed-off-by: Lance Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/13348 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/intel/apollolake_rvp')
-rw-r--r--src/mainboard/intel/apollolake_rvp/Kconfig1
-rw-r--r--src/mainboard/intel/apollolake_rvp/acpi_tables.c17
-rw-r--r--src/mainboard/intel/apollolake_rvp/dsdt.asl29
3 files changed, 47 insertions, 0 deletions
diff --git a/src/mainboard/intel/apollolake_rvp/Kconfig b/src/mainboard/intel/apollolake_rvp/Kconfig
index 9920b46fdf..5006695aab 100644
--- a/src/mainboard/intel/apollolake_rvp/Kconfig
+++ b/src/mainboard/intel/apollolake_rvp/Kconfig
@@ -4,6 +4,7 @@ config BOARD_SPECIFIC_OPTIONS
def_bool y
select SOC_INTEL_APOLLOLAKE
select BOARD_ROMSIZE_KB_8192
+ select HAVE_ACPI_TABLES
config MAINBOARD_DIR
string
diff --git a/src/mainboard/intel/apollolake_rvp/acpi_tables.c b/src/mainboard/intel/apollolake_rvp/acpi_tables.c
new file mode 100644
index 0000000000..95de1f5114
--- /dev/null
+++ b/src/mainboard/intel/apollolake_rvp/acpi_tables.c
@@ -0,0 +1,17 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corp.
+ * (Written by Lijian Zhao <lijian.zhao@intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <arch/acpi.h>
+
+void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt)
+{
+}
diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl
new file mode 100644
index 0000000000..7b9fe29759
--- /dev/null
+++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl
@@ -0,0 +1,29 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2016 Intel Corp.
+ * (Written by Lijian Zhao <lijian.zhao@intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ 0x02, /* DSDT revision: ACPI v2.0 */
+ "COREv4", /* OEM id */
+ "COREBOOT", /* OEM table id */
+ 0x20110725 /* OEM revision */
+)
+{
+ Scope (\_SB) {
+ Device (PCI0)
+ {
+ Name (_HID, EISAID ("PNP0A08")) /* PCIe */
+ }
+ }
+
+}