diff options
| author | Brandon Breitenstein <brandon.breitenstein@intel.corp-partner.google.com> | 2021-08-05 15:56:27 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-13 13:59:45 +0000 |
| commit | c54e22c589b4974b6e94e11f363f99e726661026 (patch) | |
| tree | 9c1f27d4d44fb8da287f53f5ff35e3b2e1e69fbd /src/mainboard/intel/adlrvp/variants | |
| parent | d56d2a86edace2a0058a54c2d1a075b1211e2945 (diff) | |
mb/adlrvp: Add new ADL P board variant for MCHP1727
Add new board variant to enable MCHP1727 Modular EC Card on RVP
BUG=b:179214042
BRANCH=none
TEST=emerge brya and verify that adlrvp_p_mchp images boot
Change-Id: I9dc96ad5c5db21fedbe480d19fcae8434d3bd169
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56839
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp/variants')
| -rw-r--r-- | src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb new file mode 100644 index 0000000000..a23db8c0f9 --- /dev/null +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_p_mchp/overridetree.cb @@ -0,0 +1,34 @@ +chip soc/intel/alderlake + + device domain 0 on + device ref pch_espi on + chip ec/google/chromeec + use conn0 as mux_conn[0] + use conn1 as mux_conn[1] + device pnp 0c09.0 on end + end + end + device ref pmc hidden + # The pmc_mux chip driver is a placeholder for the + # PMC.MUX device in the ACPI hierarchy. + chip drivers/intel/pmc_mux + device generic 0 on + chip drivers/intel/pmc_mux/conn + register "usb2_port_number" = "1" + register "usb3_port_number" = "1" + # SBU is fixed, HSL follows CC + register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" + device generic 0 alias conn0 on end + end + chip drivers/intel/pmc_mux/conn + register "usb2_port_number" = "2" + register "usb3_port_number" = "2" + # SBU is fixed, HSL follows CC + register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" + device generic 1 alias conn1 on end + end + end + end + end + end +end |