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| author | Subrata Banik <subrata.banik@intel.com> | 2020-11-27 00:16:46 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-12-01 07:49:32 +0000 |
| commit | 4cb8776c31ceb4a5b9e353b2e9b2a4f751e1dc54 (patch) | |
| tree | 4f387a78cc7c9e3e381392ba657c6159ff70201d /src/mainboard/intel/adlrvp/romstage_fsp_params.c | |
| parent | 3c729487bf2de44c15d0c3541ff97ed16511b635 (diff) | |
mb/intel/adlrvp: Refactor lpddr4_mem_config structure
List of changes:
1. Initialize dq_map array in a single line
2. Make dqs_map array also in a single line
TEST=Able to build and boot ADLRVP LP4 SKU.
Change-Id: I64f2b38492934c8ede301f4b252c8700060ed4ac
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48077
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp/romstage_fsp_params.c')
0 files changed, 0 insertions, 0 deletions