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authorSubrata Banik <subrata.banik@intel.com>2021-02-15 21:45:20 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-02-17 06:03:28 +0000
commit486eabce80ef8e17706d0e28d467b05b92d97ee0 (patch)
tree96103a220578c2f9530969b441ae12635071ae44 /src/mainboard/intel/adlrvp/romstage_fsp_params.c
parent547e58db8b970ef89e392899129feabe0f9e1639 (diff)
mb/intel/adlrvp: Early program SMBUS CLOCK and DATA
TEST=Ensure SMBUS CLK/DATA GPIO is in NF1. Change-Id: Id615462cc21fc24e7ec6ef16274d784d41bd9bd4 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50746 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp/romstage_fsp_params.c')
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