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authorBora Guvendik <bora.guvendik@intel.com>2022-05-27 20:21:38 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-06-14 17:57:38 +0000
commit91bc6d1da79b0c48d39770be84cdb2b2afde3050 (patch)
tree5abb8ff0d5e9e0d680f77011a31c66af3392b21d /src/mainboard/intel/adlrvp/include
parent39c0e157315f631d6dae75fc99f9879ee469bcb0 (diff)
mb/intel/adlrvp: Add new upd setting for ADL RVP with Raptor Lake
Currently, ADL FSP headers and RPL FSP headers differ. Set a RPL only upd for adlrvp with Raptor Lake silicon. This code can be removed once ADL and RPL start using the same FSP. BUG=b:229134437 BRANCH=firmware-brya-14505.B TEST=build adlrvp_rpl_ext_ec Signed-off-by: Bora Guvendik <bora.guvendik@intel.com> Change-Id: I4e69323949233aa8c325a757b28b9d80cbdf4322 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp/include')
-rw-r--r--src/mainboard/intel/adlrvp/include/baseboard/variants.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/intel/adlrvp/include/baseboard/variants.h b/src/mainboard/intel/adlrvp/include/baseboard/variants.h
index 4ae10112ce..bb2c3f62b0 100644
--- a/src/mainboard/intel/adlrvp/include/baseboard/variants.h
+++ b/src/mainboard/intel/adlrvp/include/baseboard/variants.h
@@ -33,6 +33,7 @@ void variant_configure_early_gpio_pads(void);
size_t variant_memory_sku(void);
const struct mb_cfg *variant_memory_params(void);
+void rpl_memory_params(FSPM_UPD *memupd);
/* Modify devictree settings during ramstage */
void variant_devtree_update(void);