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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-11-02 10:36:20 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-04-06 17:40:50 +0000
commit4fdd84e716bb052bfbae58366c687be2656a97bb (patch)
tree1bdd3c1bed7b16f61ce971a0a552400257e58f88 /src/mainboard/intel/adlrvp/include/baseboard/variants.h
parentafe5562ca39b26cc42ca04da55b68f73a7b70654 (diff)
ChromeOS: Promote variant_cros_gpio()
The only purpose of mainboard_chromeos_acpi_generate() was to pass cros_gpio array for ACPI \\OIPG package generation. Promote variant_cros_gpio() from baseboards to ChromeOS declaration. Change-Id: I5c2ac1dcea35f1f00dea401528404bc6ca0ab53c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58897 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp/include/baseboard/variants.h')
-rw-r--r--src/mainboard/intel/adlrvp/include/baseboard/variants.h4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/mainboard/intel/adlrvp/include/baseboard/variants.h b/src/mainboard/intel/adlrvp/include/baseboard/variants.h
index 143679ac56..4ae10112ce 100644
--- a/src/mainboard/intel/adlrvp/include/baseboard/variants.h
+++ b/src/mainboard/intel/adlrvp/include/baseboard/variants.h
@@ -6,7 +6,6 @@
#include <soc/gpio.h>
#include <soc/meminit.h>
#include <stdint.h>
-#include <vendorcode/google/chromeos/chromeos.h>
enum adl_boardid {
/* ADL-P LPDDR4 RVPs */
@@ -28,9 +27,6 @@ enum adl_boardid {
ADL_N_LP5 = 0x7,
};
-/* The next set of functions return the gpio table and fill in the number of
- * entries for each table. */
-const struct cros_gpio *variant_cros_gpios(size_t *num);
/* Functions to configure GPIO as per variant schematics */
void variant_configure_gpio_pads(void);
void variant_configure_early_gpio_pads(void);