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authorSugnan Prabhu S <sugnan.prabhu.s@intel.com>2021-07-30 20:12:22 +0530
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-09-02 22:53:26 +0000
commitfcb4f2d77e4d0c09bf8e433d724ef0ea272df815 (patch)
tree012d0334a5d7918798dd7aad6139e4356b9faea9 /src/mainboard/intel/adlrvp/devicetree_m.cb
parent93ca873f209daef0e6a53b6f16e40be3ddb82ee1 (diff)
wifi: Add support for new revisions of SAR table entries
Existing SAR infrastructure supports only revision 0 of the SAR tables. This patch modifies it to extend support for intel wifi 6 and wifi 6e configurations as per the connectivity document: 559910_Intel_Connectivity_Platforms_BIOS_Guidelines_Rev6_4.pdf The SAR table and WGDS configuration block sizes were static in the legacy SAR file format. Following is the format of the new binary file. +------------------------------------------------------------+ | Field | Size | Description | +------------------------------------------------------------+ | Marker | 4 bytes | "$SAR" | +------------------------------------------------------------+ | Version | 1 byte | Current version = 1 | +------------------------------------------------------------+ | SAR table | 2 bytes | Offset of SAR table from start of | | offset | | the header | +------------------------------------------------------------+ | WGDS | 2 bytes | Offset of WGDS table from start of | | offset | | the header | +------------------------------------------------------------+ | Data | n bytes | Data for the different tables | +------------------------------------------------------------+ This change supports both the legacy and the new format of SAR file BUG=b:193665559 TEST=Checked the SSDT entries for WRDS, EWRD and WGDS with different binaries generated by setting different versions in the config.star Change-Id: I08c3f321938eba04e8bcff4d87cb215422715bb2 Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56750 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel/adlrvp/devicetree_m.cb')
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