aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/hp
diff options
context:
space:
mode:
authorNico Huber <nico.h@gmx.de>2018-01-14 12:34:43 +0100
committerMartin Roth <martinroth@google.com>2018-01-23 05:25:41 +0000
commitff4025c5f789b80e6552dd887c34c34642a98c64 (patch)
tree852784fb6548c414d41dbdc93f4de6b5b191f9a6 /src/mainboard/hp
parent101485c73dbb7eb8d89fbfda1c1bf9a5e495b536 (diff)
sb/intel/bd82x6x: Reduce function-disable mess
Most affected boards set the function disabled (FD) register to an arbitrary state dumped from systems running the vendor BIOS. This makes it impossible to enable the devices in devicetree and a pretty big mess of course because nobody cared to keep the register in sync with the devicetree. To get completely rid of most of the writes to FD, move setting of PCH_DISABLE_ALWAYS into the southbridge code where it belongs. Change-Id: Ia2a507cbcdf218d09738e2e16f0d3ad1dcf57b8b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/23255 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hal Martin <hal.martin+coreboot@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Bill XIE <persmule@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/mainboard/hp')
-rw-r--r--src/mainboard/hp/2570p/romstage.c3
-rw-r--r--src/mainboard/hp/2760p/romstage.c3
-rw-r--r--src/mainboard/hp/8460p/romstage.c3
-rw-r--r--src/mainboard/hp/8470p/romstage.c3
-rw-r--r--src/mainboard/hp/revolve_810_g1/romstage.c6
5 files changed, 6 insertions, 12 deletions
diff --git a/src/mainboard/hp/2570p/romstage.c b/src/mainboard/hp/2570p/romstage.c
index 53b44b6c8f..0742543130 100644
--- a/src/mainboard/hp/2570p/romstage.c
+++ b/src/mainboard/hp/2570p/romstage.c
@@ -32,9 +32,8 @@ void pch_enable_lpc(void)
pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x007c0201);
}
-void rcba_config(void)
+void mainboard_rcba_config(void)
{
- RCBA32(FD) = PCH_DISABLE_ALWAYS | 0x10001fe0;
}
const struct southbridge_usb_port mainboard_usb_ports[] = {
diff --git a/src/mainboard/hp/2760p/romstage.c b/src/mainboard/hp/2760p/romstage.c
index 0d48f58e7f..c6d9a7c535 100644
--- a/src/mainboard/hp/2760p/romstage.c
+++ b/src/mainboard/hp/2760p/romstage.c
@@ -31,9 +31,8 @@ void pch_enable_lpc(void)
pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x007c0201);
}
-void rcba_config(void)
+void mainboard_rcba_config(void)
{
- RCBA32(FD) = PCH_DISABLE_ALWAYS | 0x10001fe0;
}
const struct southbridge_usb_port mainboard_usb_ports[] = {
diff --git a/src/mainboard/hp/8460p/romstage.c b/src/mainboard/hp/8460p/romstage.c
index 7d228e99cd..0aa9a1ae58 100644
--- a/src/mainboard/hp/8460p/romstage.c
+++ b/src/mainboard/hp/8460p/romstage.c
@@ -38,9 +38,8 @@ void pch_enable_lpc(void)
pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x007c0201);
}
-void rcba_config(void)
+void mainboard_rcba_config(void)
{
- RCBA32(FD) = PCH_DISABLE_ALWAYS | 0x10001fe0;
}
const struct southbridge_usb_port mainboard_usb_ports[] = {
diff --git a/src/mainboard/hp/8470p/romstage.c b/src/mainboard/hp/8470p/romstage.c
index 2f48aaa6ac..bb9298ca9b 100644
--- a/src/mainboard/hp/8470p/romstage.c
+++ b/src/mainboard/hp/8470p/romstage.c
@@ -37,9 +37,8 @@ void pch_enable_lpc(void)
pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x007c0201);
}
-void rcba_config(void)
+void mainboard_rcba_config(void)
{
- RCBA32(FD) = PCH_DISABLE_ALWAYS | 0x10001fe0;
}
const struct southbridge_usb_port mainboard_usb_ports[] = {
diff --git a/src/mainboard/hp/revolve_810_g1/romstage.c b/src/mainboard/hp/revolve_810_g1/romstage.c
index dbf786eda4..c70660aee9 100644
--- a/src/mainboard/hp/revolve_810_g1/romstage.c
+++ b/src/mainboard/hp/revolve_810_g1/romstage.c
@@ -37,13 +37,11 @@ void pch_enable_lpc(void)
pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x007c0201);
}
-void rcba_config(void)
+void mainboard_rcba_config(void)
{
- /* Disable devices. */
RCBA32(BUC) = 0x00000000;
- RCBA32(FD) = 0x17f21feb;
-
}
+
const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 1, 0 },
{ 1, 0, 0 },