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authorArthur Heymans <arthur@aheymans.xyz>2022-11-12 14:51:49 +0100
committerPaul Fagerburg <pfagerburg@chromium.org>2023-02-04 01:42:39 +0000
commitb5df65a9aaee50421913ace6d7a4b35e0ddff676 (patch)
treeaa885e29c4e724f4fb583bca5c93fe1243e95da2 /src/mainboard/hp/snb_ivb_laptops
parent9ce7935b490830a709c62e271bf269801520ec29 (diff)
mb/*: Replace SNB PCI devices with references from chipset.cb
Removing default on/off from mainboard devicetrees is left as a follow-up. Change-Id: I74c34a97ea4340fb11a0db422a48e1418221627e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69502 Reviewed-by: Jakub Czapiga <jacz@semihalf.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/mainboard/hp/snb_ivb_laptops')
-rw-r--r--src/mainboard/hp/snb_ivb_laptops/devicetree.cb30
1 files changed, 15 insertions, 15 deletions
diff --git a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
index a4d723fe4e..54d522c93d 100644
--- a/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
+++ b/src/mainboard/hp/snb_ivb_laptops/devicetree.cb
@@ -18,7 +18,7 @@ chip northbridge/intel/sandybridge
device domain 0 on
- device pci 00.0 on end # Host bridge
+ device ref host_bridge on end # Host bridge
chip southbridge/intel/bd82x6x # Intel Cougar or Panther Point PCH
register "pcie_port_coalesce" = "true"
@@ -26,24 +26,24 @@ chip northbridge/intel/sandybridge
register "spi_uvscc" = "0x2005"
register "spi_lvscc" = "0"
- device pci 16.0 on end # Management Engine Interface 1
- device pci 16.1 off end # Management Engine Interface 2
- device pci 16.2 off end # Management Engine IDE-R
- device pci 16.3 off end # Management Engine KT
- device pci 19.0 on end # Intel Gigabit Ethernet
- device pci 1a.0 on end # USB2 EHCI #2
- device pci 1b.0 on end # HD Audio controller
- device pci 1d.0 on end # USB2 EHCI #1
- device pci 1e.0 off end # PCI bridge
- device pci 1f.0 on # LPC bridge
+ device ref mei1 on end # Management Engine Interface 1
+ device ref mei2 off end # Management Engine Interface 2
+ device ref me_ide_r off end # Management Engine IDE-R
+ device ref me_kt off end # Management Engine KT
+ device ref gbe on end # Intel Gigabit Ethernet
+ device ref ehci2 on end # USB2 EHCI #2
+ device ref hda on end # HD Audio controller
+ device ref ehci1 on end # USB2 EHCI #1
+ device ref pci_bridge off end # PCI bridge
+ device ref lpc on # LPC bridge
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end
end
- device pci 1f.2 on end # SATA Controller 1
- device pci 1f.3 on end # SMBus
- device pci 1f.5 off end # SATA Controller 2
- device pci 1f.6 off end # Thermal
+ device ref sata1 on end # SATA Controller 1
+ device ref smbus on end # SMBus
+ device ref sata2 off end # SATA Controller 2
+ device ref thermal off end # Thermal
end
end
end