diff options
| author | Riku Viitanen <riku.viitanen@protonmail.com> | 2024-02-14 01:18:45 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-26 13:12:30 +0000 |
| commit | 309534183f963c02a87b17493108751f8e3e8b49 (patch) | |
| tree | 18baf87a9820a803c1bb4d6eed3c2e22965693c4 /src/mainboard/hp/snb_ivb_desktops/devicetree.cb | |
| parent | 99bf23c9e73c7492ee9d5c1f208bceedf3ff7cb5 (diff) | |
mb/hp/snb_ivb_desktops: Make baseboard more generic
In preparation to merging all the other HP sandy/ivy desktops in here
as variants.
Move hda_verb.c, early_init.c, gma-mainboard.ads and data.vbt into
variant directories.
Kconfig:
Move options not common to the others under the variants instead.
devicetree:
Move XHCI to variant overridetrees (8200 gen has no USB 3)
board_info.txt:
Make it more generic. It seems to be copied from 8200 SFF and
inaccurate to Z220 anyway.
TEST: BUILD_TIMELESS=1 & Don't include .config in ROM image. CMT and
SFF ROMs are (SHA1) same as before.
Change-Id: Icce22efb8d353359781db3f03c67058d8fbe11b8
Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79543
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Diffstat (limited to 'src/mainboard/hp/snb_ivb_desktops/devicetree.cb')
| -rw-r--r-- | src/mainboard/hp/snb_ivb_desktops/devicetree.cb | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/mainboard/hp/snb_ivb_desktops/devicetree.cb b/src/mainboard/hp/snb_ivb_desktops/devicetree.cb index d1aa57627a..113b5551ef 100644 --- a/src/mainboard/hp/snb_ivb_desktops/devicetree.cb +++ b/src/mainboard/hp/snb_ivb_desktops/devicetree.cb @@ -9,8 +9,6 @@ chip northbridge/intel/sandybridge register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}" device domain 0 on - subsystemid 0x103c 0x1791 inherit - device ref host_bridge on end device ref peg10 on end device ref igd on end @@ -25,11 +23,7 @@ chip northbridge/intel/sandybridge register "sata_interface_speed_support" = "0x3" register "spi_lvscc" = "0x2005" register "spi_uvscc" = "0x2005" - register "superspeed_capable_ports" = "0x0000000f" - register "xhci_switchable_ports" = "0x0000000f" - register "xhci_overcurrent_mapping" = "0x0000000f" - device ref xhci on end device ref mei1 on end device ref mei2 off end device ref me_ide_r off end |