mb/hp: Add Pro 3500 series (Sandy/Ivy Bridge)

This is another readily available (used market) system.
Based on autoport.

* All peripherals should work.
* Automatic fan control as well as S3 are working.
* The board was tested to boot Linux and Windows. EHCI debug is
  untested.
* When using MrChromebox edk2 with secure boot build in, the board will
  hang on each boot for about 20 seconds before continuing.

There are some quirks for doing the first flash, see the documentation.

Change-Id: Idf793fe915096cf2553572964faec5c7f8526b9a
Signed-off-by: Joel Linn <jl@conductive.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>

1 files changed, 33 insertions, 0 deletions

diff --git a/src/mainboard/hp/pro_3500_series/mainboard.c b/src/mainboard/hp/pro_3500_series/mainboard.c
new file mode 100644
index 0000000000..a3b7504e7f
--- /dev/null
+++ b/src/mainboard/hp/pro_3500_series/mainboard.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cpu/intel/model_206ax/model_206ax.h>
+#include <cpu/x86/msr.h>
+#include <device/device.h>
+#include <static_devices.h>
+#include <superio/ite/it8772f/chip.h>
+
+static u8 cpu_get_temp_offset(void)
+{
+	msr_t msr = rdmsr(MSR_TEMPERATURE_TARGET);
+	u8 tj_max = (msr.lo >> 16) & 0xFF;
+	u8 tcc_offset = (msr.lo >> 24) & 0xf;
+
+	msr = rdmsr(MSR_PLATFORM_INFO);
+	if (msr.lo & (1 << 30)) {
+		return tj_max - tcc_offset;
+	} else {
+		return tj_max;
+	}
+}
+
+static void mainboard_enable(struct device *dev)
+{
+	/* Set PECI TMPIN 3 offset to TJ_MAX temperature */
+	struct superio_ite_it8772f_config *const config = __pnp_002e_04->chip_info;
+	if (config)
+		config->ec.tmpin[2].offset = cpu_get_temp_offset();
+}
+
+struct chip_operations mainboard_ops = {
+	.enable_dev = mainboard_enable,
+};