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authorPatrick Georgi <patrick.georgi@coresystems.de>2010-03-18 20:58:41 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-03-18 20:58:41 +0000
commit78acf932912669eb0eb7f7280da1b3c550035ebb (patch)
tree89f13a87df362395527d41f42d0a57a167eab8db /src/mainboard/hp/dl145_g3
parent2bd91003413d431f0a4db6c3c6691f4b688cf5c5 (diff)
Remove remaining uses of
HAVE_FAILOVER_BOOT HAVE_FALLBACK_BOOT USE_FAILOVER_IMAGE USE_FALLBACK_IMAGE Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/hp/dl145_g3')
-rw-r--r--src/mainboard/hp/dl145_g3/romstage.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c
index db65f65493..64b1c79b72 100644
--- a/src/mainboard/hp/dl145_g3/romstage.c
+++ b/src/mainboard/hp/dl145_g3/romstage.c
@@ -61,7 +61,6 @@
#include "pc80/mc146818rtc_early.c"
-#if CONFIG_USE_FAILOVER_IMAGE==0
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "lib/ramtest.c"
@@ -73,8 +72,6 @@
#include "cpu/amd/model_fxx/apic_timer.c"
#include "lib/delay.c"
-#endif
-
#include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/amd/amdk8/reset_test.c"
@@ -83,8 +80,6 @@
#include "superio/nsc/pc87417/pc87417_early_serial.c"
-#if CONFIG_USE_FAILOVER_IMAGE==0
-
#include "cpu/x86/bist.h"
#include "northbridge/amd/amdk8/debug.c"
@@ -153,8 +148,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
#include "cpu/amd/model_fxx/fidvid.c"
-#endif
-
#include "northbridge/amd/amdk8/early_ht.c"
#if 0
@@ -195,8 +188,6 @@ static void setup_early_ipmi_serial()
}
#endif
-#if CONFIG_USE_FAILOVER_IMAGE==0
-
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
static const uint16_t spd_addr[] = {
@@ -312,4 +303,3 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
-#endif