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| author | Matt DeVillier <matt.devillier@puri.sm> | 2021-04-01 14:03:03 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-18 20:39:23 +0000 |
| commit | e79431288209f239600874b8f0c45a9490fa0ed6 (patch) | |
| tree | 13d9c989198bb829977faefde5aab95c67b24c75 /src/mainboard/google | |
| parent | ab3fb6bba3b3b91b2c8e32df727af7aab4fa6884 (diff) | |
mb/purism/librem_14: Update GPIO config
Update GPIO config based on review of latest schematics:
- LAN/WLAN reset lines are NC
- SDIO lines configured via GPP_G0-G7
- DMIC lines are wired directly to codec, not PCH, so GPP_D17-20
are set to NC
- Pads GPP_H0-H3 are configured for I2S2
- Pads GPP_H7-H9 are straps for board revision, so treated as GPI
- CPU_C10_GATE# is NC
- PWRBTN# does not need an internal pull-up
- GPP_C20-23 are configured for M.2 UART
- SATAXPCIE1/2 and EC SCI/SMI lines do not need internal pull ups
- GPP_C6/C7 set to I2C1 for future use
- GPP_E15 changed from SCI to SMI, edge triggered
Change-Id: If113cfeadf093e10dd84ab827ead594088f02ba1
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52389
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
0 files changed, 0 insertions, 0 deletions