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authorBrandon Breitenstein <brandon.breitenstein@intel.com>2016-07-22 12:25:40 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2016-07-28 21:21:06 +0200
commitdf12d1923f76576534bbdfe69e2fd56d9c820faf (patch)
tree187b996da7b8a91114277de199c86c8bc6148d5d /src/mainboard/google
parentfde3275fb432128dcdd244f598e36692103c2433 (diff)
soc/intel/apollolake: Update FSP Header files for version 146_30
Add new UPDs for Fspm and Fsps. Update headers to make new UPDs available for use. New UPDs enable various memory and trace funtionality options as well as support for zero sized IBB region. BUG=chrome-os-partner:55513 BRANCH=none TEST=built and tested with no regressions Change-Id: Id1573baaa306ed4fe4353df5f27e5963cb1a76e6 Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/15815 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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