diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-05-04 17:08:11 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-05 17:38:14 +0000 |
| commit | da4e1d780656d6a733f7c2445697466c86a8e901 (patch) | |
| tree | 306e6df6215c3445eb58bd0a677df6da2c52cba6 /src/mainboard/google | |
| parent | 7fd65e9b3abd0c0f0359d0d91baf27a441ceaab6 (diff) | |
soc/intel/tigerlake: Add enum for `DdiPortXConfig`
Add an enum for `DdiPortXConfig` devicetree options. Note that setting
these options to zero does not disable the corresponding DDI port, but
instead indicates that no LFP (Local Flat Panel, i.e. internal LCD) is
connected to it.
Change-Id: I9ea10141e51bf29ea44199dcd1b55b63ec771c0a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/deltaur/variants/baseboard/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb index f5dc01910d..6603bafccc 100644 --- a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb @@ -116,7 +116,7 @@ chip soc/intel/tigerlake register "TcssXhciEn" = "1" # DisplayPort - register "DdiPortAConfig" = "1" # eDP + register "DdiPortAConfig" = "DDI_PORT_CFG_EDP" register "DdiPortAHpd" = "1" # Disable PM to allow for shorter irq pulses diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 5e5a5863dd..9f3987e672 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -239,8 +239,8 @@ chip soc/intel/tigerlake register "TcssAuxOri" = "0" # DP port - register "DdiPortAConfig" = "1" # eDP - register "DdiPortBConfig" = "0" + register "DdiPortAConfig" = "DDI_PORT_CFG_EDP" + register "DdiPortBConfig" = "DDI_PORT_CFG_NO_LFP" register "DdiPortAHpd" = "1" register "DdiPortBHpd" = "1" |