diff options
author | Ren Kuo <ren.kuo@quanta.corp-partner.google.com> | 2024-11-12 15:38:41 +0800 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2024-11-15 02:21:39 +0000 |
commit | c95f2eeebf4ccbb0047605516ef77b059eb528a8 (patch) | |
tree | b9cbfa86ddfbb26659e798547b4d6d9ef827d5ae /src/mainboard/google | |
parent | 1a22344d58657f144171bb419828ca4733cb93a6 (diff) |
mb/google/brox/var/jubilant: Add fw_config for WWAN Sar Sensor
The current WWAN(LTE) does not require any sar setting from RF team's
suggestion, and sar sensor will be removed from DVT schematic.
To reserve the extendibility, add the fw_config DB_1A_LTE_SAR:
field DB_USB 11 12
option DB_1A 0 (None LTE)
option DB_1A_LTE 1 (LTE without sar sensor)
option DB_1A_LTE_SAR 2 (LTE with sar sensor)
end
Base on the fw_config to enable/disable related functions:
0)Disable WWAN and Sar if DB_USB = DB_1A
1)Enable WWAN and disable sar sensor if DB_USB = DB_1A_LTE
2)Enable WWAN and Sar sensor if DB_USB = DB_1A_LTE_SAR
BUG=b:375341992
TEST=Build and verify on jubilant by DB_USB= 0,1,and 2 of fw_config
Check sar sensor and WWAN module from commands:
ls -l /sys/bus/i2c/devices
i2cdetect -y -r
lsusb
Change-Id: If9231ac8df94e1dc514ecf0780c99adbfb902893
Signed-off-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85107
Reviewed-by: Kenneth Chan <kenneth.chan@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard/google')
3 files changed, 27 insertions, 3 deletions
diff --git a/src/mainboard/google/brox/variants/jubilant/fw_config.c b/src/mainboard/google/brox/variants/jubilant/fw_config.c index df57e15804..6d50ca2495 100644 --- a/src/mainboard/google/brox/variants/jubilant/fw_config.c +++ b/src/mainboard/google/brox/variants/jubilant/fw_config.c @@ -46,6 +46,21 @@ static const struct pad_config lte_disable_pads[] = { PAD_NC(GPP_A12, NONE), /* GPP_H23 : WWAN_RST_L */ PAD_NC(GPP_H23, NONE), + /* GPP_H19 : SRCCLKREQ4_L ==> SAR1_INT_L (NC) */ + PAD_NC(GPP_H19, NONE), +}; + +static const struct pad_config lte_sar_disable_pads[] = { + /* GPP_D5 : WWAN_SAR_ODL */ + PAD_NC(GPP_D5, NONE), + /* GPP_S4 : WWAN_WLAN_COEX1 */ + PAD_NC(GPP_S4, NONE), + /* GPP_S5 : WWAN_WLAN_COEX2 */ + PAD_NC(GPP_S5, NONE), + /* GPP_F6 : WWAN_WLAN_COEX3 */ + PAD_NC(GPP_F6, NONE), + /* GPP_H19 : SRCCLKREQ4_L ==> SAR1_INT_L (NC) */ + PAD_NC(GPP_H19, NONE), }; static const struct pad_config nvme_disable_pads[] = { @@ -69,11 +84,16 @@ static void fw_config_handle(void *unused) gpio_configure_pads(fp_disable_pads, ARRAY_SIZE(fp_disable_pads)); } - if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1A_LTE))) { + if (fw_config_probe(FW_CONFIG(DB_USB, DB_1A))) { printk(BIOS_INFO, "Disable LTE-related GPIO pins by fw_config.\n"); gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads)); } + if (fw_config_probe(FW_CONFIG(DB_USB, DB_1A_LTE))) { + printk(BIOS_INFO, "Disable LTE's Sar sensor related GPIO pins by fw_config.\n"); + gpio_configure_pads(lte_sar_disable_pads, ARRAY_SIZE(lte_sar_disable_pads)); + } + if (!fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME))) { printk(BIOS_INFO, "Disable NVMe GPIO pins by fw_config.\n"); gpio_configure_pads(nvme_disable_pads, ARRAY_SIZE(nvme_disable_pads)); diff --git a/src/mainboard/google/brox/variants/jubilant/overridetree.cb b/src/mainboard/google/brox/variants/jubilant/overridetree.cb index 48cc783077..880b3dd057 100644 --- a/src/mainboard/google/brox/variants/jubilant/overridetree.cb +++ b/src/mainboard/google/brox/variants/jubilant/overridetree.cb @@ -10,6 +10,7 @@ fw_config field DB_USB 11 12 option DB_1A 0 option DB_1A_LTE 1 + option DB_1A_LTE_SAR 2 end field FPMCU 17 18 option FPMCU_ABSENT 0 @@ -220,6 +221,7 @@ chip soc/intel/alderlake register "type" = "UPC_TYPE_INTERNAL" device ref usb2_port4 on probe DB_USB DB_1A_LTE + probe DB_USB DB_1A_LTE_SAR probe unprovisioned end end @@ -269,6 +271,7 @@ chip soc/intel/alderlake register "type" = "UPC_TYPE_INTERNAL" device ref usb3_port4 on probe DB_USB DB_1A_LTE + probe DB_USB DB_1A_LTE_SAR probe unprovisioned end end @@ -431,7 +434,7 @@ chip soc/intel/alderlake register "input_precharge_resistor_ohms" = "4000" register "input_analog_gain" = "1" device i2c 28 on - probe DB_USB DB_1A_LTE + probe DB_USB DB_1A_LTE_SAR probe unprovisioned end end diff --git a/src/mainboard/google/brox/variants/jubilant/variant.c b/src/mainboard/google/brox/variants/jubilant/variant.c index ff84374cc3..0ff82d017e 100644 --- a/src/mainboard/google/brox/variants/jubilant/variant.c +++ b/src/mainboard/google/brox/variants/jubilant/variant.c @@ -38,7 +38,8 @@ const char *variant_get_auxfw_version_file(void) static void wwan_out_of_reset(void *unused) { - if (fw_config_probe(FW_CONFIG(DB_USB, DB_1A_LTE))) { + if (fw_config_probe(FW_CONFIG(DB_USB, DB_1A_LTE)) || + fw_config_probe(FW_CONFIG(DB_USB, DB_1A_LTE_SAR))) { gpio_set(WWAN_FCPO_L, 1); gpio_set(WWAN_RSL_L, 1); } |