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authorEric Lai <eric_lai@quanta.corp-partner.google.com>2022-05-16 15:06:41 +0800
committerFelix Held <felix-coreboot@felixheld.de>2022-05-18 11:14:42 +0000
commitbf7b05fcc37e2b3b7344054e354e893f979cd55a (patch)
tree6f9cd5820132e98f152660bbca6b0dea82082518 /src/mainboard/google
parent539fd2ac5a0f510d8434d4cc8a597f092325b8c8 (diff)
mb/google/nissa: Change EC wake interrupt to IRQ
EC wake event doesn't work. Nissa has a separate EC wake pin. SCI only is not handled by EC, so we need to set dual route to wake the system. BUG=b:229142661 TEST=EC wake event work as expected. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: Ide1f4a2494bb0a64b11ab4c5135fc43d2a635f74 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64379 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org> Reviewed-by: Reka Norman <rekanorman@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/brya/variants/baseboard/nissa/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
index 53ec244b8a..0fce609ac0 100644
--- a/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
@@ -242,7 +242,7 @@ static const struct pad_config gpio_table[] = {
/* F16 : NC */
PAD_NC_LOCK(GPP_F16, NONE, LOCK_CONFIG),
/* F17 : THC1_SPI2_RST# ==> EC_SOC_WAKE_ODL */
- PAD_CFG_GPI_SCI_LOCK(GPP_F17, NONE, LEVEL, INVERT, LOCK_CONFIG),
+ PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F17, NONE, LEVEL, INVERT, LOCK_CONFIG),
/* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
PAD_CFG_GPI_LOCK(GPP_F18, NONE, LOCK_CONFIG),
/* F19 : Not available */