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authorChia-Ling Hou <chia-ling.hou@intel.com>2023-06-07 17:20:34 +0800
committerMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-06-29 17:07:28 +0000
commitbf557e0d4328703eccba07e52ac620b60083191e (patch)
treee685599eef8269b3478b053207f99066778500de /src/mainboard/google
parent84ecd89830fe4dfd462e47b06de66006f04658ad (diff)
mb/google/dedede/var/dibbi: Update power limits
Add ramstage.c in Makefile.inc and update Dibbi power limits in Dibbi ramstage.c. BUG=b:281479111 TEST=emerge-dedede coreboot and check psys and PLx value on dibbi Signed-off-by: Chia-Ling Hou <chia-ling.hou@intel.com> Change-Id: Ieaff856b762b546f3e99acb7ba2ce15791193da6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75681 Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/dedede/variants/dibbi/Makefile.inc1
-rw-r--r--src/mainboard/google/dedede/variants/dibbi/ramstage.c35
2 files changed, 36 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/dibbi/Makefile.inc b/src/mainboard/google/dedede/variants/dibbi/Makefile.inc
index eb2c9bc021..66f0263c62 100644
--- a/src/mainboard/google/dedede/variants/dibbi/Makefile.inc
+++ b/src/mainboard/google/dedede/variants/dibbi/Makefile.inc
@@ -1,3 +1,4 @@
## SPDX-License-Identifier: GPL-2.0-or-later
ramstage-y += gpio.c
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/dedede/variants/dibbi/ramstage.c b/src/mainboard/google/dedede/variants/dibbi/ramstage.c
new file mode 100644
index 0000000000..64510cc644
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/dibbi/ramstage.c
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+
+/*
+ * Psys_pmax considerations
+ *
+ * Given the hardware design in dibbi, the serial shunt resistor is 0.01ohm.
+ * The full scale of hardware PSYS signal 1.6v maps to system current 6.009A
+ * instead of real system power. The equation is shown below:
+ * PSYS = 1.6v ~= (0.01ohm x 6.009A) x 50 (INA213, gain 50V/V) x R631/(R631 + R638)
+ * R631/(R631 + R638) = 0.5325 = 36K / (36K + 31.6K)
+ *
+ * The Psys_pmax is a SW setting which tells IMVP9.1 the mapping between system input
+ * current and the actual system power. Since there is no voltage information
+ * from PSYS, different voltage input would map to different Psys_pmax settings:
+ * For Type-C 15V, the Psys_pmax should be 15v x 6.009A = 90.135W
+ * For Type-C 20V, the Psys_pmax should be 20v x 6.009A = 120.18W
+ * For a barrel jack, the Psys_pmax should be 19v x 6.009A = 114.171W
+ *
+ * Imagine that there is a type-c 100W (20V/5A) connected to DUT w/ full loading,
+ * and the Psys_pmax setting is 120W. Then IMVP9.1 can calculate the current system
+ * power = 120W * 5A / 6.009A = 100W, which is the actual system power.
+ */
+const struct psys_config psys_config = {
+ .efficiency = 97,
+ .psys_imax_ma = 6009,
+ .bj_volts_mv = 19000,
+ .bj_power_w = 65,
+};
+
+void variant_devtree_update(void)
+{
+ variant_update_psys_power_limits(&psys_config);
+}