diff options
| author | Alan Huang <alan-huang@quanta.corp-partner.google.com> | 2022-01-19 11:57:34 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-14 16:12:21 +0000 |
| commit | aae362c4edbec8420cc5df60553f3763543ae2b5 (patch) | |
| tree | 16378c961e477a17c8a0ee9772cfd04fe1c42772 /src/mainboard/google | |
| parent | ad90edc3e07ea98e7660d25faadab169fbc74479 (diff) | |
mb/google/brya/var/brask: Enable ASPM of RTL8125
Brask cannot pass powerd_dbus_suspend test because the NIC does not
enter ASPM L1.2. Here we add "enable_aspm_l1_2" in devicetree for
RTL8125 to enable ASPM L1.2.
BUG=b:204309459
BRANCH=None
TEST=emerge and test with command powerd_dbus_suspend
Signed-off-by: Alan Huang <alan-huang@quanta.corp-partner.google.com>
Change-Id: I9a56df1d68696f409f9ee681d37de6759a588d80
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61268
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/brya/variants/brask/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb index 66d450d3af..17c9e86a3e 100644 --- a/src/mainboard/google/brya/variants/brask/overridetree.cb +++ b/src/mainboard/google/brya/variants/brask/overridetree.cb @@ -92,6 +92,7 @@ chip soc/intel/alderlake register "led_feature" = "0xe0" register "customized_led0" = "0x23f" register "customized_led2" = "0x028" + register "enable_aspm_l1_2" = "1" device pci 00.0 on end end end # RTL8125 Ethernet NIC |