aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard/google
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2022-12-01 18:51:49 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-01-25 00:38:09 +0000
commita14901804b6d46e6e05932d6dc9901c5208853b5 (patch)
tree2b635f168c14bb607f7897b7cae55fd3cca324c7 /src/mainboard/google
parent95747bd24df095fae26e6fadb6e8ed0b07e84a06 (diff)
mb/google/skyrim/baseboard/devicetree: enable mp2 device
The mp2 PCI device is still present when no mp2 firmware is loaded. When this device isn't explicitly enabled in the mainboard's devicetree, the chipset devicetree default of the device being disabled is used. This results in coreboot's resource allocator not allocating resources to the device and since the bridge doesn't have enough MMIO space reserved, the Linux kernel can't assign resources to it. To fix this problem, enable the mp2 device in the mainboard's devicetree so that it gets its resources assigned by coreboot. An equivalent change was verified on Chausie. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I1076ccacc6f51bf195b8280a6df5ad1849771519 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72196 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/skyrim/variants/baseboard/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
index a0d38300e3..698d8c3258 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
@@ -162,6 +162,7 @@ chip soc/amd/mendocino
end
end
device ref acp on end # Audio Processor (ACP)
+ device ref mp2 on end # Sensor Fusion Hub (MP2)
end
device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C
device ref xhci_2 on # USB 2.0 (USB2)