diff options
| author | Frank Chu <Frank_Chu@pegatron.corp-partner.google.com> | 2022-11-18 16:39:36 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2022-11-21 01:14:59 +0000 |
| commit | 88019ddbdf367ce8e44fd46d46ad042f9ca78355 (patch) | |
| tree | 05efb0bf4897421dca69114727c0f6f320771793 /src/mainboard/google | |
| parent | e5b8a04f846874d3282923bf1bf15a2077bd440e (diff) | |
mb/google/brya/var/marasov: update field STORAGE of fw_config
field STORAGE 30 31
option STORAGE_UNKNOWN 0
option STORAGE_NVME 1
option STORAGE_UFS 2
end
BUG=b:254365935
TEST=emerge-brya coreboot.
Signed-off-by: Frank Chu <Frank_Chu@pegatron.corp-partner.google.com>
Change-Id: I17f8a852808d279a1f2b08b364cd4e525a807560
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69786
Reviewed-by: Frank Chu <frank_chu@pegatron.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/brya/variants/marasov/overridetree.cb | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/marasov/overridetree.cb b/src/mainboard/google/brya/variants/marasov/overridetree.cb index 6b6fd3e57a..b09d2f30ce 100644 --- a/src/mainboard/google/brya/variants/marasov/overridetree.cb +++ b/src/mainboard/google/brya/variants/marasov/overridetree.cb @@ -13,8 +13,9 @@ fw_config option THERMAL_15W 1 end field STORAGE 30 31 - option STORAGE_NVME 0 - option STORAGE_UFS 1 + option STORAGE_UNKNOWN 0 + option STORAGE_NVME 1 + option STORAGE_UFS 2 end end @@ -123,6 +124,7 @@ chip soc/intel/alderlake .clk_req = 1, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" + probe STORAGE STORAGE_UNKNOWN probe STORAGE STORAGE_NVME end device ref ish on |