diff options
author | Kane Chen <kane.chen@intel.corp-partner.google.com> | 2021-11-19 14:47:06 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-25 21:06:36 +0000 |
commit | 7fd65a9791a7cc0d2655b282cb8a9b7e333ee121 (patch) | |
tree | d128141966416f39a96f53a2e4bfa8af80f11216 /src/mainboard/google | |
parent | 1a2e5c5627dfdf87fd9e0430b66167104897cb22 (diff) |
src/mb/brya: Enable crashlog on brya0
Enabling crashlog helps partners to debug hang issues efficiently.
BUG=b:195327879
TEST=Found BERT table is created and the tcss function is ok in
depthcharge. Warm/cold/suspend_stress test pass 50 cycles on gimble
Change-Id: Ib4bbe5d7cece0c6c5fc170460d55ac820054abb9
Signed-off-by: Kane Chen <kane.chen@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59486
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r-- | src/mainboard/google/brya/Kconfig.name | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 3a43b9ca6a..92b71a878c 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -8,6 +8,7 @@ config BOARD_GOOGLE_BRYA0 select HAVE_WWAN_POWER_SEQUENCE select SOC_INTEL_COMMON_BLOCK_IPU select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES + select SOC_INTEL_CRASHLOG config BOARD_GOOGLE_BRASK bool "-> Brask" |