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authorShelley Chen <shchen@google.com>2019-03-26 11:12:56 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-03-28 06:37:11 +0000
commit60aaac7ad08456c8b8b1891288fb8ec118a7077f (patch)
treec3da9ec0a0927e1f797acfd8ac003a9eafcdc39f /src/mainboard/google
parent68890b9d59d0f87533d3eacb6de1d552dcb72679 (diff)
mb/google/hatch: Initialize FPMCU_PCH_BOOT1
In the latest hatch schematics, BOOT1 for the FP MCU is now connected to the AP. Configuring it to be the same as BOOT0. BUG=b:126455006 BRANCH=None TEST=./util/abuild/abuild -p none -t google/hatch -x -a -c max Change-Id: Ibb451983674a7d812dc562cb8addb1dc50fb155c Signed-off-by: Shelley Chen <shchen@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32060 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/hatch/variants/baseboard/gpio.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c
index 3d6be33682..68bbaabee1 100644
--- a/src/mainboard/google/hatch/variants/baseboard/gpio.c
+++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c
@@ -33,8 +33,8 @@ static const struct pad_config gpio_table[] = {
/* A8 : EMR_GARAGE_DET */
PAD_CFG_GPI_GPIO_DRIVER(GPP_A8, NONE, DEEP),
/* A9 : ESPI_CLK */
- /* A10 : PEN_RESET_ODL */
- PAD_NC(GPP_A10, NONE),
+ /* A10 : FPMCU_PCH_BOOT1 */
+ PAD_CFG_GPO(GPP_A10, 0, DEEP),
/* A11 : PCH_SPI_FPMCU_CS_L */
PAD_CFG_NF(GPP_A11, NONE, DEEP, NF2),
/* A12 : FPMCU_RST_ODL */