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authorJoey Peng <joey.peng@lcfc.corp-partner.google.com>2022-12-05 23:30:55 +0800
committerEric Lai <eric_lai@quanta.corp-partner.google.com>2022-12-12 01:26:37 +0000
commit5a724a1adc40486bcfdc9db56029b683b8405413 (patch)
tree7877ca7259c932156bba130b84eef8f284a93389 /src/mainboard/google
parentbd9ab06808e956135a961566d0644c404b1ab751 (diff)
mb/google/octopus/variants/phaser: Implement variant_memory_sku()
This change override memory ID 3 to 1 to workaround the incorrect memory straps in hardware. We would use board_id 7 to identify the specific boards which need to correct the memory ID. BUG=b:259301885 BRANCH=Octopus TEST=Verified on Phaser Signed-off-by: Joey Peng <joey.peng@lcfc.corp-partner.google.com> Change-Id: I2330b7e16a09f8cc76ed96e81a6165afa80a03a4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70353 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Derek Huang <derekhuang@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Henry Sun <henrysun@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/octopus/variants/phaser/Makefile.inc2
-rw-r--r--src/mainboard/google/octopus/variants/phaser/memory.c22
2 files changed, 24 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/phaser/Makefile.inc b/src/mainboard/google/octopus/variants/phaser/Makefile.inc
index 37270eb960..22ef41c3a2 100644
--- a/src/mainboard/google/octopus/variants/phaser/Makefile.inc
+++ b/src/mainboard/google/octopus/variants/phaser/Makefile.inc
@@ -1,5 +1,7 @@
bootblock-y += gpio.c
+romstage-y += memory.c
+
ramstage-y += variant.c
ramstage-y += gpio.c
ramstage-y += mainboard.c
diff --git a/src/mainboard/google/octopus/variants/phaser/memory.c b/src/mainboard/google/octopus/variants/phaser/memory.c
new file mode 100644
index 0000000000..f7c31cdc90
--- /dev/null
+++ b/src/mainboard/google/octopus/variants/phaser/memory.c
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+#include <boardid.h>
+#include <gpio.h>
+#include <variant/gpio.h>
+
+size_t variant_memory_sku(void)
+{
+ size_t rt;
+ gpio_t pads[] = {
+ [3] = MEM_CONFIG3, [2] = MEM_CONFIG2,
+ [1] = MEM_CONFIG1, [0] = MEM_CONFIG0,
+ };
+
+ rt = gpio_base2_value(pads, ARRAY_SIZE(pads));
+
+ if (board_id() == 7)
+ return (rt == 3) ? 1 : rt; // If RAM ID = 3, return 1
+ else
+ return rt;
+}