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authorTim Wawrzynczak <twawrzynczak@chromium.org>2022-06-24 15:31:36 -0600
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-07-13 16:09:46 +0000
commit52ccd293d7814a5495b2e679f31f41c030643c8e (patch)
treed66f8256145adbe2e63ac707ee26d52084392822 /src/mainboard/google
parentef886f3034e7086795c387b156bc92831ada94e8 (diff)
mb/google/brya: Implement shutdown function for dGPU
Variants of brya that have a dGPU also need to perform a special shutdown sequence in the _PTS ACPI Method. Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ib760fa65e6e021c0949187f13f038d3e952e5910 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65488 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/brya/mainboard.c33
1 files changed, 22 insertions, 11 deletions
diff --git a/src/mainboard/google/brya/mainboard.c b/src/mainboard/google/brya/mainboard.c
index 78bd30e000..4e0cf080d2 100644
--- a/src/mainboard/google/brya/mainboard.c
+++ b/src/mainboard/google/brya/mainboard.c
@@ -14,6 +14,7 @@
#include <stdio.h>
WEAK_DEV_PTR(rp6_wwan);
+WEAK_DEV_PTR(dgpu);
static void add_fw_config_oem_string(const struct fw_config *config, void *arg)
{
@@ -102,7 +103,7 @@ static void mainboard_dev_init(struct device *dev)
mainboard_ec_init();
}
-static void mainboard_generate_shutdown(const struct device *dev)
+static void mainboard_generate_wwan_shutdown(const struct device *dev)
{
const struct drivers_wwan_fm_config *config = config_of(dev);
const struct device *parent = dev->bus->dev;
@@ -119,12 +120,18 @@ static void mainboard_generate_shutdown(const struct device *dev)
acpigen_emit_byte(ARG0_OP);
}
acpigen_write_if_end();
- } else {
- acpigen_emit_namestring(acpi_device_path_join(dev, "DPTS"));
- acpigen_emit_byte(ARG0_OP);
}
}
+static void mainboard_generate_dgpu_shutdown(const struct device *dev)
+{
+ /* Call `_OFF` from the Power Resource associated with the dGPU's PEG port. */
+ const struct device *parent = dev->bus->dev;
+
+ if (parent)
+ acpigen_emit_namestring(acpi_device_path_join(parent, "PGPR._OFF"));
+}
+
static void mainboard_generate_s0ix_hook(void)
{
acpigen_write_if_lequal_op_int(ARG0_OP, 1);
@@ -145,14 +152,18 @@ static void mainboard_generate_s0ix_hook(void)
static void mainboard_fill_ssdt(const struct device *dev)
{
const struct device *wwan = DEV_PTR(rp6_wwan);
+ const struct device *dgpu = DEV_PTR(dgpu);
+
+ acpigen_write_scope("\\_SB");
+ acpigen_write_method_serialized("MPTS", 1);
+ if (wwan)
+ mainboard_generate_wwan_shutdown(wwan);
+ if (dgpu)
+ mainboard_generate_dgpu_shutdown(dgpu);
+
+ acpigen_write_method_end(); /* Method */
+ acpigen_write_scope_end(); /* Scope */
- if (wwan) {
- acpigen_write_scope("\\_SB");
- acpigen_write_method_serialized("MPTS", 1);
- mainboard_generate_shutdown(wwan);
- acpigen_write_method_end(); /* Method */
- acpigen_write_scope_end(); /* Scope */
- }
/* for variant to fill additional SSDT */
variant_fill_ssdt(dev);