summaryrefslogtreecommitdiff
path: root/src/mainboard/google
diff options
context:
space:
mode:
authorJon Murphy <jpmurphy@google.com>2023-04-06 10:17:25 -0600
committerFelix Held <felix-coreboot@felixheld.de>2023-04-21 16:09:01 +0000
commit4b94f1dc874af4c851db28b70a0e0330748f2f08 (patch)
tree210a73a6b3ac5823052d71ce0e1d56012f7de9e6 /src/mainboard/google
parentf88d9d90495b4103aa569197ce5eed5a8e1679fd (diff)
mb/google/myst: Enable mp2 device
The mp2 PCI device is still present when no mp2 firmware is loaded. When this device isn't explicitly enabled in the mainboard's devicetree, the chipset devicetree default of the device being disabled is used. This results in coreboot's resource allocator not allocating resources to the device and since the bridge doesn't have enough MMIO space reserved, the Linux kernel can't assign resources to it. Enable the mp2 device in the mainboard's devicetree so that it gets its resources assigned by coreboot. BUG=b:277217097 TEST=builds Change-Id: I21885c51ff08846b456675090946f381843ef5e6 Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74277 Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/google')
-rw-r--r--src/mainboard/google/myst/variants/baseboard/devicetree.cb1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/myst/variants/baseboard/devicetree.cb b/src/mainboard/google/myst/variants/baseboard/devicetree.cb
index 669d6ecd53..9fc5bfe571 100644
--- a/src/mainboard/google/myst/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/myst/variants/baseboard/devicetree.cb
@@ -132,6 +132,7 @@ chip soc/amd/phoenix
end
end
device ref acp on end # Audio Processor (ACP)
+ device ref mp2 on end # Sensor Fusion Hub (MP2)
end
device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C
device ref usb4_xhci_0 on