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authorScott Chao <Scott_Chao@wistron.com>2023-02-21 11:34:35 +0800
committerFelix Held <felix-coreboot@felixheld.de>2023-03-04 02:05:05 +0000
commit40e1cce7e1b62f5c4152664325776453275f6d4e (patch)
tree71bc877908618fce9bb090b72b99e5a7a56c73d4 /src/mainboard/google
parent53db677586e3e7c4a874f1ef16f34a6d01c269a0 (diff)
soc/intel/alderlake: Add UWES ASL into xhci.asl
Align support for enable wake-on-usb attach/detach as was introduced in Cannon Lake in commit 811284125f0a ("soc/intel/cannonlake: Add UWES ASL into xhci.asl"). This adds the USB Wake Enable Setup (UWES) ASL blocks required to inform the OS about plug wake events bits being set in the PORTSCN register configured by devicetree. BUG=b:230398487 BRANCH=none TEST=Verify USB-A device could wake up Moli. Signed-off-by: Scott Chao <Scott_Chao@wistron.com> Change-Id: Icbc427a89413f5fe3a4a533135cc2c39349a9580 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73173 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/google')
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