diff options
| author | Tao Xia <xiatao5@huaqin.corp-partner.google.com> | 2021-08-05 19:24:21 +0800 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2021-08-09 20:10:21 +0000 |
| commit | 3c8dc63457145fe4cc799d1c7207535f7616af75 (patch) | |
| tree | a69dedde8ba5c9fa08576fc9f600684e5088772d /src/mainboard/google | |
| parent | 7c1eda0cbc799e981995d4e7572af1498694deaf (diff) | |
mb/google/dedede/var/storo: Fixed iasl can not run on Dut
The TSR1._PSV has been redefined.
It will report errors when disassembling the ACPI tables with the iasl.
It is OK when Removing the TSR1._PSV and adding the TSR0._PSV
BUG=b:194509417
BRANCH=dedede
TEST=The iasl can run on Dut successfully
Signed-off-by: Tao Xia <xiatao5@huaqin.corp-partner.google.com>
Change-Id: I524255c79d3c71573d122944da5058389f79d95d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56828
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Evan Green <evgreen@chromium.org>
Diffstat (limited to 'src/mainboard/google')
| -rw-r--r-- | src/mainboard/google/dedede/variants/storo/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/dedede/variants/storo/overridetree.cb b/src/mainboard/google/dedede/variants/storo/overridetree.cb index aedb285d36..90ad9adb85 100644 --- a/src/mainboard/google/dedede/variants/storo/overridetree.cb +++ b/src/mainboard/google/dedede/variants/storo/overridetree.cb @@ -86,7 +86,7 @@ chip soc/intel/jasperlake chip drivers/intel/dptf ## Passive Policy register "policies.passive" = "{ - [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 67, 3000), + [0] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 67, 3000), [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 67, 3000), [2] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_1, 67, 3000),}" ## Critical Policy |